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Stacked dual in-line memory modules coming to you in 2010
Samsung Electronics steps up chip-stacking with memory packages that are faster, smaller and consume less power

Samsung Electronics has released details on its own all-DRAM stacked memory package using through-silicon via (TSV) technology. The new wafer-level-processed stacked package (WSP) consists of four 512Mb DDR2 DRAM chips that offer a combined 2Gb of high density memory. Using the TSV-processed 2Gb DRAMs, Samsung says it can create a 4GB DIMM based on advanced WSP technology, while reducing overall package size, power use and increasing chip speed.

In today’s MCPs, memory chips are connected by wire bonding, requiring vertical spacing between dies that is tens of microns deep. That wire bonding process also requires horizontal spacing on the package board hundreds of microns wide for the die-connecting wires. Samsung’s WSP technology forms laser-cut micron-sized holes that penetrate the silicon vertically to connect the memory circuits directly with a copper filling, eliminating the need for gaps of extra space and wires protruding beyond the sides of the dies. These advantages permit a significantly smaller footprint and thinner package.

Inside the new WSP, the TSV is housed within an aluminum pad to escape the performance-slow-down effect caused by the redistribution layer. Samsung announced a similar method last year involving NAND flash dies, but the company says that, due to the complexity of DRAM stacking, this represented a much more difficult engineering feat than that accomplished with the first WSP.

In addition, as the back side of the wafer is ground away to make a thinner stack of multiple dies, the wafer has had a tendency to curve, creating physical distortion in the die. To overcome this additional critical concern in designing low-profile, high-density MCPs containing DRAM circuitry, Samsung’s proprietary wafer-thinning technology, announced last year, has been applied to improve the thin-die-cutting process.

“The innovative TSV-based MCP (multi-chip package) stacking technology offers next-generation packaging solution that will accommodate the ever-growing demand for smaller-sized, high-speed, high-density memory,” said Tae-Gyeong Chung, vice president, Interconnect Technology Development Team, Memory Division, Samsung Electronics. “In addition, the performance advancements achieved by our WSP technology can be utilized in many diverse combinations of semiconductor packaging, such as system-in-package solutions that combine logic with memory.”

The latest developments in chip stacking and through through-silicon via are heralding announcements from chip companies saying that Moore’s Law will continue to ring true, especially in light of the  considerable concern that MCP would soon suffer from performance limitations when connected using current technologies.

Earlier this month, IBM announced it own chip-making breakthrough using through-silicon via technology, boasting that the technique shortens wire lengths inside chips up to 1000 times and allows for the addition of up to 100 times more channels, or pathways, for that information to flow compared to traditional chips.

IBM says that it is already running chips using the through-silicon via technology in its manufacturing line and will begin making sample chips using this method available to customers in the second half of 2007, with production in 2008. Samsung, on the other hand, says that its new and more complex DRAM stacked package design will support next-generation computing systems beginning in 2010.

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By Quiksel on 4/24/2007 2:24:18 PM , Rating: 2
gotta love it.

I think it's awesome as consumers that we get to see challenges such as this overcome every now and then. Just like CPU's, when we think there's just no way around certain limitations, someone comes up with a way to make it work, and we all benefit.

Ahh, the information age.

Remember, when we're all 80, we'll be telling stories to our grandkids about when the "Pentium" and "Athlon" processors were the coolest things since sliced bread, and they ran at BREAKNECK "gigahertz" they will all laugh since we're so old. Man, at least we were there when it started. :)


RE: progress...
By sviola on 4/24/07, Rating: 0
RE: progress...
By GhandiInstinct on 4/24/2007 2:53:51 PM , Rating: 2
Very true, except I don't think processors as we know them today will be described anywhere near in the same terms as an Athlon or Pentium, I think when we're 80, the world of technology will have a whole new face plate.

Of course, give, that you yourself aren't like 50 right now.

RE: progress...
By phaxmohdem on 4/24/2007 7:45:34 PM , Rating: 2
A mere 36 years ago, Intel was pumping out 4004's which could basically only do very basic calculations.

In 36 years from now I imagine that current processors will be about as useless. I don't think many of us will have to live to the age of 80 to laugh at present technology.

Hell I get a good laugh or two just reminiscing about my family's "kick ass" IBM PC AT 286-6MHz Beast. And that wasn't too incredibly long ago.

RE: progress...
By Shadowself on 4/24/2007 9:16:05 PM , Rating: 2
Well, in 36 years I will be over 80.

The last 36 years have been a wild ride. The last 46 even more so. Most people don't think of it, but the 60's ushered in a lot of change. It's just the personal computer (and back then hobbyist) market that started to see changes in the 70s.

Let's see what's what when I'm over 100!

RE: progress...
By bighairycamel on 4/24/2007 3:24:18 PM , Rating: 3
Unless we see a huge change in computing as we know it, CPUs won’t get much “faster” than the GHz ranges. Transistors are limited because of skew rates. However, I do remember seeing an article where scientists were able to get a transistor to switch in the hundreds of GHz range… but that was near absolute zero.

So most of the advancements will probably come in the form of architecture, as shown by the multi-core push in current platforms. But I can’t say what technology will be like 50 years from now.

RE: progress...
By Polynikes on 4/24/2007 4:05:45 PM , Rating: 2
I imagine the processors of the future (57 years from now when I'm 80) will be utterly and completely different from the ones we have now. I'm sure there will be some major breakthrough akin to the vacuum tube-to-transistor switch that will make processors hundreds of times better than they are now.

RE: progress...
By Visual on 4/24/2007 4:16:42 PM , Rating: 2
But that's the thing - we will definitely see huge changes. Optical, spintronic, quantum computing... technological progress is going so much faster and faster that it may be impossible to predict. A lot of people predict a technological singularity before 2040, and I'm getting impatient already, actually.

RE: progress...
By geddarkstorm on 4/24/2007 5:18:37 PM , Rating: 2
Have you ever read Newton's Wake? I'm not sure a technological singularity would be a good thing.

However, fortunately for us, all advances can only occur so far as the laws of nature allow.

RE: progress...
By rrsurfer1 on 4/24/2007 6:55:24 PM , Rating: 2
Not really true. If you understand why the laws function you can bend/break them. Of course to do that you really need unimaginable amounts of energy that we don't have a hope of generating for a few hundred years at the least. Read about superstring theory, fascinating stuff.

The future
By Rexehuk on 4/24/2007 4:04:40 PM , Rating: 2
Well in my eyes future things such as motherboards etc will have fibre optic linked components compared to conventional tracks within PCB's. Or perhaps even a faster form of transport will be invented but highly unlikely as light is the way forward in my eyes.


RE: The future
By wetwareinterface on 4/25/2007 7:51:53 AM , Rating: 3
well probably not too much takeover in the near future.
optics only help in the heat area and signal integrity area not speed area.
electricity moves down a wire at the speed of light same speed as fiber optics.
optical transfer keeps emf from happening and when we get to massivly parallel bus systems again to gain speed we will then need optical.
right now the trend is serialized high speed links to avoid emf crosstalk from messing with the integrity of the data running across the bus. there is plenty of headroom left in serialized data to allow for another decade at least of speed increments in system designs for desktop level systems. wire is easier to deal with and lay traces for and with serialized communications methods like pci-e and usb and hypertransport having plenty of room for growth and speed increases it'll be awhile till we need multiples of serial busses to handle the speed hence unless you need massive data movement as in massive web company ala google datacenter level motion you are not gonna see much optical tech for a while.

This is pretty cool
By Comdrpopnfresh on 4/24/2007 6:36:17 PM , Rating: 2
I wonder what kind of yields they could expect. And with stacked gates running at higher speeds, how heat dissipation will occur for the inner layers

RE: This is pretty cool
By rrsurfer1 on 4/24/2007 6:58:17 PM , Rating: 2
Well by stacking the chips they certainly improve yeild over a singe chip design. The reason is a large chip may have a few defects that prevent them from using the die... however with smaller chips they just pick out the good ones and stack them up. The smaller peices allow them to "work around" the errors, and assemble the product like a puzzle. This is all assuming the actual stacking process is fairly error-free, which is probably the case.

papers/diagram of TSV and WSP?
By pastrami on 4/25/2007 1:35:25 PM , Rating: 2
wow, this is interesting stuff ... does anyone know where I can read more about TSV or WSP ... papers, presentations, etc?

By StarOrbiter on 4/25/2007 4:03:44 PM , Rating: 2
Check the wikipedia ... they sometimes find leads~

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