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32nm Planar transistor on the left versus 22nm 3D Tri-Gate transistor on the right. The yellow dots represent current flow.  (Source: Intel)

The 22nm 3D tri-gate transistor   (Source: Intel)
New 22nm 3D Tri-Gate transistors will boost performance by up to 37 percent compared to existing 32nm technology

When it comes to making advances in manufacturing technologies for semiconductors, we can always look to Intel to lead the way. Today is no exception as the Santa Clara, California-based company announced today that it will incorporate 3D transistors into its upcoming 22nm microprocessors. 

Intel says that its 3D transistor design, which it calls Tri-Gate, marks the first time that a three-dimensional structure has been incorporated into high-volume production. Ivy Bridge will be the first recipient of Tri-Gate.

"Intel's scientists and engineers have once again reinvented the transistor, this time utilizing the third dimension," said Intel President and CEO Paul Otellini. "Amazing, world-shaping devices will be created from this capability as we advance Moore's Law into new realms."

Intel goes on to describe 3D Tri-Gate as follows:

The traditional "flat" two-dimensional planar gate is replaced with an incredibly thin three-dimensional silicon fin that rises up vertically from the silicon substrate. Control of current is accomplished by implementing a gate on each of the three sides of the fin – two on each side and one across the top -- rather than just one on top, as is the case with the 2-D planar transistor. The additional control enables as much transistor current flowing as possible when the transistor is in the "on" state (for performance), and as close to zero as possible when it is in the "off" state (to minimize power), and enables the transistor to switch very quickly between the two states (again, for performance). 

Just as skyscrapers let urban planners optimize available space by building upward, Intel's 3-D Tri-Gate transistor structure provides a way to manage density. Since these fins are vertical in nature, transistors can be packed closer together, a critical component to the technological and economic benefits of Moore's Law. For future generations, designers also have the ability to continue growing the height of the fins to get even more performance and energy-efficiency gains.

Tri-Gate will provide unprecedented levels of performance and power savings according to Intel. The technology will allow processors to run at lower voltages while at the same time limiting the amount of leakage current. In fact, Intel says that processors using 22nm Tri-Gate transistors offers up to a whopping 37 percent performance boost at low voltages.

Naturally, higher performance at lower operating voltage will do wonders in Intel's never-ending quest to chase down low-power ARM chips with its Atom-based processors.

"The low-voltage and low-power benefits far exceed what we typically see from one process generation to the next," said Intel Senior Fellow Mark Bohr. "It will give product designers the flexibility to make current devices smarter and wholly new ones possible. We believe this breakthrough will extend Intel's lead even further over the rest of the semiconductor industry." 

Ivy Bridge processors using Intel's 3D Tri-Gate technology will enter production later this year. You can watch a YouTube clip on 3D Tri-Gate here.

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37% Increase?
By flurazepam on 5/4/2011 1:26:51 PM , Rating: 4

RE: 37% Increase?
By Brandon Hill on 5/4/2011 1:27:59 PM , Rating: 2
My thoughts exactly! :)

RE: 37% Increase?
By MrBlastman on 5/4/2011 1:36:46 PM , Rating: 2
I sooo wanted to be able to buy AMD again someday (used them for 10 years)... but, it looks like my next upgrade will be Intel once again. :(

37% is 37%. That's a huge number in this game.

RE: 37% Increase?
By therealnickdanger on 5/4/2011 2:01:22 PM , Rating: 3
That video was very cool! I never really give what goes into making a processor much thought, but it's always good to get some perspective. Technology is f*cking awesome.

37% increase in performance WITH more than 50% power reduction. I was already thinking of skipping Sandy Bridge due to the absense of USB3, but now I feel like it's just the right thing to do even moreso. Besides, I want to see what Llano can do...

RE: 37% Increase?
By AnnihilatorX on 5/5/2011 5:46:36 AM , Rating: 2
I am sure AMD has something similiar in mind.

3D transistors had been hinted in academic paper, of course the specific design Intel use had been kept secret.

The question is when AMD can do catch up

RE: 37% Increase?
By B3an on 5/5/2011 10:18:56 AM , Rating: 1
I read about 3D transistors well over 5 years ago. It's not like AMD, ARM, and everyone else didn't know this was coming.

I'm glad to see it's almost here for consumers.

RE: 37% Increase?
By Da W on 5/5/2011 10:44:44 AM , Rating: 2,2817,2384927,

3D Transistors? We Don't Need 'Em, AMD's Foundry Says
Globalfoundries has yet to specify the direction it plans to go to 22/20-nm manufacturing, beyond a plan it released in Sept. 2010. Then, it said that it will use a "High Performance" technology for servers and media processors, a 20-nm "Super Low Power" technology for mobile chips, and a 20-nm "Super High Performance" technology for high-end products. But the company has also ruled out following Intel's lead.

"We and our development partners have longstanding programs to evaluate options for next-generation transistors, including non-planar structures, and we don't see the need for these technologies until beyond the 22/20nm generation," Globalfoundries said in a statement. "Our focus for 22/20nm is to maintain the same increases in performance, power efficiency, and density that we've seen moving from 45/40nm to 32/28nm with the addition of High-k Metal Gate (HKMG). Planar CMOS allows us to achieve these requirements with multiple innovations in materials integration, lithography, and interconnect technology."

That may mean that Globalfoundries, which shares R&D expenses with IBM and Samsung, may pick up the pace. "We believe foundries are working on similar technology but remain 18-24 months behind Intel's ability to bring the technology to market (expect attempts at 14nm)," Doug Freedman, an analyst with Gleacher & Co., wrote in a research note.

RE: 37% Increase?
By Gondor on 5/4/2011 1:38:23 PM , Rating: 2
What a way to sour AMD's upcoming launches :(

"The next best thing" is always just around the corner so I was eagerly awaiting Bulldozer ... but 37% ?

RE: 37% Increase?
By Da W on 5/4/2011 1:58:30 PM , Rating: 3
Yup, there's an advantage Intel has that nobody else can challenge.

RE: 37% Increase?
By StevoLincolnite on 5/4/2011 2:06:33 PM , Rating: 3
Doesn't mean the CPU is 37% faster, I assume it's just the transistors switch 37% faster.
CPU architectural efficiencies will still apply.

RE: 37% Increase?
By kattanna on 5/4/2011 4:20:34 PM , Rating: 3
it also states at low voltages, which might be the "catch" here.

RE: 37% Increase?
By tastyratz on 5/4/2011 9:52:29 PM , Rating: 2
very well could be. Does this mean low operating voltages or lower than standard performance voltages? Better speedstep performance? it might not mean 37% actual better power savings or performance overall, just special situations. I look forward to seeing how it plays out. 37% of anything is a bold claim.

RE: 37% Increase?
By AnnihilatorX on 5/5/2011 10:52:49 AM , Rating: 2
Quoting Anandtech:

At lower voltages Intel is claiming a 37% increase in performance vs. its 32nm process and an 18% increase in performance at 1V. High end desktop and mobile parts fall into the latter category. Ivy Bridge is likely to see gains on the order of 18% vs. Sandy Bridge, however Intel may put those gains to use by reducing overall power consumption of the chip as well as pushing for higher frequencies. The other end of that curve is really for the ultra mobile chips, this should mean big news for the 22nm Atom which I'm guessing we'll see around 2013.

RE: 37% Increase?
By Jeffk464 on 5/4/2011 3:48:12 PM , Rating: 2
Yup, bad news for AMD and bulldozer.

RE: 37% Increase?
By Skywalker123 on 5/4/2011 6:22:10 PM , Rating: 2
Me too, I've been itching to replace the E8500 I have, I figured I would try Bulldozer, but now I guess I'll wait for Ivy Bridge.

RE: 37% Increase?
By Adonlude on 5/5/2011 4:30:40 PM , Rating: 2
I'm still gaming on an E6700 and WinXP. Darn, looks like I will be waiting longer for more FPS!

RE: 37% Increase?
By FaceMaster on 5/4/2011 1:58:15 PM , Rating: 2
37%? That's like, almost 38...

...but still a long way away from 9000.

RE: 37% Increase?
By digitalreflex on 5/4/2011 2:07:31 PM , Rating: 2
While AMD might not be able to compete toe to toe on performance (not that they have a bad product), I have no doubt if they weren't there to push Intel this wouldn't be happening now. Competition is great!

RE: 37% Increase?
By Amiga500 on 5/5/2011 4:31:40 AM , Rating: 2
Not yikes... that includes the process shrink of going from 32nm to 22nm. So they'd be seeing maybe a 25% change anyway.

More pertinently, at higher voltages, that performance improvement drops off.

Basically, this is good for low power devices and energy efficiency, but not such a big deal at the high end. Therefore BD is not the one directly under threat, but Bobcat and Llano are - luckily for AMD they are probably the parts with the greatest competitive margin to Intel's offerings.

By MrTeal on 5/4/2011 1:39:48 PM , Rating: 3
Does Intel actually call the gate 3D? In the images you have posted, the gate is the silvery beam looking thing. It's always been 3D-ish. What they're doing here is making the diffusion channel 3D so the gate contacts it on three sides.

RE: Confusing
By LRonaldHubbs on 5/4/2011 3:11:47 PM , Rating: 4
It depends how you think of the gate. If by gate you mean the poly (or metal these days), then yes it has always been 3D. However, if by gate you mean the junction between said poly/metal and the channel, then the gate has now changed from 2D to 3D with this technology.

RE: Confusing
By EricMartello on 5/4/2011 5:23:53 PM , Rating: 2
They're called 3D because rather than simply shrinking a typical transistor even further (to the point where quantum weirdness occurs), the transistors improve performance by "stacking" additional gates within the same "footprint". In other words, the CPU is getting a few nanometers taller, but you could theoretically double or triple the number of transistors per core without having to shrink them down.

A questionable analogy for this would be to think of 3D transistors to regular transistors as Multi-core CPUs to regular CPUs, in the sense that both a multi-core CPU and regular CPU fit into an identically sized socket, yet the multi-core CPU offers greater performance with its additional cores.

RE: Confusing
By LRonaldHubbs on 5/4/2011 5:47:20 PM , Rating: 3
Well, sort of. They are improving performance by wrapping the gate around three sides of the channel instead of just one. As you can see in the picture above, this actually comes at an area penalty since what could have been a single diffusion bed now has to be split up into narrower pieces. Where a multi-fingered FET in currently technology would look like a solid rectangle with gates across the surface, it now looks like a waffle and must be bigger to achieve the same net channel width. However , since the channel is gated from three sides, they can now add a height component as well as width, which apparently regains more than the lost area.

Rather than calling this stacking, I would liken it to the perpendicular bit revolution that happened in hard disk platters several years back.

RE: Confusing
By AnnihilatorX on 5/5/2011 5:48:55 AM , Rating: 2
I agree. This should be called perpendicular encompassing gate or something like that.

If they use the word 3D now, a true 3D stacked transistors chip will be called what? 4D?

RE: Confusing
By EricMartello on 5/6/2011 7:14:36 PM , Rating: 2
Well, sort of. They are improving performance by wrapping the gate around three sides of the channel instead of just one. As you can see in the picture above, this actually comes at an area penalty since what could have been a single diffusion bed now has to be split up into narrower pieces. Where a multi-fingered FET in currently technology would look like a solid rectangle with gates across the surface, it now looks like a waffle and must be bigger to achieve the same net channel width. However , since the channel is gated from three sides, they can now add a height component as well as width, which apparently regains more than the lost area.

Rather than calling this stacking, I would liken it to the perpendicular bit revolution that happened in hard disk platters several years back.

In a nutshell they're being stacked to cram more transistors into the same amount of space without having to shrink them down any further - which is what I said. Let's keep the explanations simple lest ye wish to start an AMD vs Intel battle.

RE: Confusing
By LRonaldHubbs on 5/18/2011 8:01:30 AM , Rating: 2
No, they aren't. I was polite in my initial response, but what you said is wrong. Nothing is being stacked here in the z dimension, the circuits still reside in the x,y plane. All they are doing is turning the gate on it's side so that it is now vertically oriented, which lets them fit more FETs side by side in the same 2D space.

There is a different 3D technology, which you seem to be confusing, in which multiple circuit layers get stacked on top of each other. It's called 3DIC, and it is not what this article is about.

RE: Confusing
By Irene Ringworm on 5/4/2011 5:43:07 PM , Rating: 2
To be clear, this isn't some slick marketing term that Intel dreamed up to move product. In the technical literature the "3-D" qualifier is used generically to refer to nonplanar or stacked architectural schemes.

And I am just about to...
By warisz00r on 5/4/2011 2:04:59 PM , Rating: 2 myself a shiny new Sandy Bridge equipped laptop.

Does anyone know when Ivy Bridge will start featuring in consumer devices?

RE: And I am just about to...
By Lord 666 on 5/4/2011 2:20:52 PM , Rating: 2
Around mid-august like C2D.

RE: And I am just about to...
By warisz00r on 5/4/2011 2:47:10 PM , Rating: 2
If that's so... well, I have waited for Sandy Bridge to come ashore where I live but with this new announcement from Intel, if I buy a SB-equipped laptop anytime soon, it will go obsolete in less than 5 months! Awesome.

RE: And I am just about to...
By silverblue on 5/4/2011 3:23:14 PM , Rating: 2
Anand doesn't believe Ivy Bridge will be around until the first half of 2012. I'm now wondering where "Enhanced" Bulldozer fits into the scheme of things; supposedly, it's due sometime in 2012 but AMD's not even got its first Bulldozer out yet so I wouldn't expect this to come quickly.

And Steve is right: it's not going to magically translate into a 37% performance boost. I read recently that Intel is expecting a 20% boost over Sandy Bridge, which is still very impressive.

Definitely a good time to be interested in technology. :)

RE: And I am just about to...
By Gondor on 5/5/2011 3:03:39 AM , Rating: 2
As far as I'm concerned I'll be dancing around in circles if they put out performance equivalent of the i7 2600K that consumes 20% (16%; 37%; 50%; whatever) less power and consequently produces less heat. It would be like Core2 era all over again, similar performance to previous generation but without the room-heater side effect :)

RE: And I am just about to...
By Da W on 5/5/2011 10:48:24 AM , Rating: 2
Intel made the same statement when moving from Conroe (65nm) to Peryn (45nm) with the introduction of High-K dialectic. It didn't show that much inprovement in the end.

RE: And I am just about to...
By name99 on 5/5/2011 4:27:32 PM , Rating: 2
You miss the point of high-k dielectric.
That was not to speed things up by ITSELF, it ENABLED the other goodness that comes from a die shrink. Without high-k, the leakage power of these shrunk devices would be substantially higher.

To me it seems that these 3D transistors are the same sort of thing. Intel PR is trumpeting them to the skies, and they do show Intel's leadership in this area, but they are again an ENABLING technology, that allows the whole constellation of goodness we expect from smaller transistors --- higher speed, lower power, more transistors on die, to continue through one more die shrink. They are not, by themselves, the whole story.

By Aloonatic on 5/4/2011 3:30:45 PM , Rating: 2
Most people here seem to think that this is bad news just for AMD, but there seems to be a lot of reference to low voltage and efficiency in this press release.

It this as much about showing that Intel is serious about producing low power CPUs/SoCs to rival ARM as showing that it is going all out for for AMD in the desktop/laptop market?

By EricMartello on 5/4/2011 5:28:26 PM , Rating: 2
Two points:

- Lower voltage means lower power utilization and lower TDP. It's not a bad thing to increase performance while reducing power requirements.

- If this were a technology aimed solely at "low end, budget and mobile" markets, it would be an even bigger threat to AMD because those are the verticals keeping AMD in the CPU game.

I'd really like to see some serious competition from AMD but it has been over a decade since AMD was truly competitive with Intel.

By Iketh on 5/4/2011 10:40:27 PM , Rating: 3
OVER a decade?? It's much less than a decade still... try 6 years

By EricMartello on 5/6/2011 7:33:10 PM , Rating: 2
Six years ago from this year coincides with the release of Intel's Core2Duo line of processors, which was basically the deathblow to AMD's chances of having competitive streak any time soon...

Prior to that the AMD offers were not exactly blazing past Intel's offerings, even with the relatively inefficient P4 - the fastest P4 (extreme edition) was faster than the fastest AMD offering. We're defining "competitive" as having equal or at least similar performance. While there may be overlap between some AMD and Intel CPUs in terms of performance, the fastest Intel CPU trounces the fastest AMD offering by far, and it has been this way for over a decade. Why?

The price:performance advantage was essentially gone during the P4 era. It was the Athlon/Athlon64 days circa 2000 (TBird, Palomino, T-Bred) where AMD was actually competitive and even seemed to have an advantage over Intel because their CPUs were just as powerful and 30-40% cheaper . Today, AMD's CPUs are not just as powerful as Intel's even if they are still slightly cheaper, and therefore are not competitive. My math tells me 2011 minus 2000 is 11 years, also known as over a decade.

By Iketh on 5/18/2011 12:25:16 PM , Rating: 2
Quit blurring the line between competitive and performance leader. AMD was last competitive 6 years ago, even by your own definition.

Oh cool
By Shadowmage on 5/4/2011 1:35:44 PM , Rating: 3
RE: Oh cool
By BailoutBenny on 5/4/2011 5:00:53 PM , Rating: 3
Was that a stab at Intel, as if they were behind the curve?

One of the authors of the paper you linked is Wen Chin Lee:

Wen-Chin Lee received the B.S. degree in electrical engineering from National
Tsing-Hua University, Hsinchu, Taiwan, R.O.C., in 1993, and the M.S.
and Ph.D. degrees in electrical engineering from the University of California,
Berkeley, in 1997 and 1999, respectively. His research involved poly-SiGe gate
for dual-gate CMOS application and other advanced deep-submicron technologies.
He joined Intel Corp., Hillsboro, OR, in 2000, as a Senior Process Engineer,
and is currently involved with the development of 0.1-m CMOS technology
and novel process modules.

Not to mention Intel has a lot of research partnerships with U.C. Berk.

RE: Oh cool
By sxs537 on 5/4/2011 5:20:17 PM , Rating: 2
And there is a lot of difference in making a singe device in a lab and making a stable manufacturing process to mass produce millions of chips (serving 80% of the market)......

The whole engineering challenge apart, it is a supply chain and logistics nigtmare (I am assuming Intel would manufacture it across the globe eventually and also sources stuff from all over the world)........ and Intel is the only manufacturer in the planet that can do it at such a scale with such a machine like efficiency.......I am more amazed by that than the physics of it (which is very impressive too).....

Is this a patented tech?
By vortmax2 on 5/4/2011 5:18:23 PM , Rating: 2
Or can it be patented/licensed? I'm wondering what the other fab folks plan to do when their processes get below 22/14nm...

RE: Is this a patented tech?
By sxs537 on 5/4/2011 6:03:26 PM , Rating: 2
I am sure Intel has a bunch of patents on some of the specific inventions but the idea of a FinFET is well known. And Intel never licenses its process technology. So the other manufacturers have to figure it out themselves how to make FinFETs manufacturable in high volume and then make them yield so that it is cost effective.

By Irene Ringworm on 5/4/2011 6:07:35 PM , Rating: 2
All of the major industry players are working on variants of this same technology. IBM, for example, seems to be targeting a dual-gate FinFET on SOI, and the general idea of a nonplanar architecture originated with Hitachi engineer Digh Hisamoto in the 1990s.

By Ilovethebox4 on 5/5/2011 5:53:35 PM , Rating: 2
I'm really finding this hard to grasp. 37%? really? That is nothing and is probably what you get after one or two model increments anyway. And as Steve said, it will only probably translate to 20% actual performance gains, then on top of that you gotta remember they were comparing a 2d 32nm to a 3d 22nm, so much of that increase is probably coming from the fact that its a 22nm, so u gotta really compare 2d 22nm to a 3d 22nm and then what? Is the real gain about 10%? or, what? Is it 15%?

I cannot believe people can get excited about nothing, and they are using words like unprecedented and biggest difference in 50 years. I was expecting a difference of about 10 to 15 fold, being 1500% or so. Even when I read 37% I just assumed I understood it wrong, but it turns out I didn't. How f-ing pathetic and depressing and what a colossal waste of 10 years R&D - this is just woefully depressing. If this is the best our best chipmaker can do, then we are doomed.

Don't get too carried away
By name99 on 5/5/2011 4:20:19 PM , Rating: 1
These power reduction numbers presumably refer to the power lost in transistors. It's nice that this has been reduced, but on modern CPUs, as I understand it, most power is lost in the wires, not in the transistors. So I suspect that the overall effect on power in not nearly as dramatic as is suggested here.

By BaronMatrix on 5/4/11, Rating: -1
By BSMonitor on 5/4/2011 5:20:55 PM , Rating: 1
Holy $hit! He's back! Still waiting on that K10 true quad core to bankrupt Intel??

By LRonaldHubbs on 5/4/2011 6:06:55 PM , Rating: 2
How's that 4x4 platformance working out for you? You should write a rap song about it if you haven't already.

By yomamafor1 on 5/5/2011 2:10:22 AM , Rating: 2
I thought he already migrated onto FASN8 (self-proclaimed, anyway).

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