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Hardware Intel Shows Off "Tigerton" Xeon MP
Anh Tuan Huynh (Blog) - October 23, 2006 3:08 PM
Print E-mail del.icio.us 11 comment(s) - last by s12033722.. on Oct 24 at 3:29 PM
One system, sixteen cores

CNET reports Intel has been demonstrating its upcoming Xeon MP replacement—currently known as Tigerton. Tigerton will be the first Core micro architecture based Xeon MP processor. Current Xeon MP processors are based on the existing Netburst architecture that is being phased out by Intel. Tigerton is currently being demonstrated in four-way system configurations. Each Tigerton processor contains four cores for a total of 16 cores for the overall system.

Tigerton processors will be backed by Intel’s upcoming Clarksboro chipset which moves away from the current dual-independent bus architecture. This should resolve bottlenecks currently associated with Intel’s shared front-side bus that requires two processors to share a single bus.

Intel’s Tigerton is expected in Q3’2007 and offer greater power efficiency. It is unknown what models will be available at launch. Pricing structure is also unknown at the moment.


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Shifting the burden
By Ecmaster76 on 10/24/2006 12:01:30 AM , Rating: 1
If each core has an independent bus to the north bridge that means that a 4 way board will have to supply the traces for 16 buses.

1 bus boards are complicated because parallel buses (such as the design used by Intel) requires all traces to be precisely laid out to have the exact same length. Multiply this by 16 and you have a very hard board to design, manufacture, and sell (due to the high price tag).

So if my analysis is correct Intel has shifted the burden of performance from their CPU team to their own (and others') mainboard team.




RE: Shifting the burden
By darkfoon on 10/24/2006 12:23:17 AM , Rating: 3
quote:
If each core has an independent bus to the north bridge...


If you read the article more closely, you'll see that it states that each processor has 4 cores. Which means the board has 4 CPUs, for a total of 16 cores. They don't have traces for 16 cores, they have traces for 4 CPUs.
Not as bad as you thought, but still difficult.


RE: Shifting the burden
By mikecel79 on 10/24/2006 1:01:12 AM , Rating: 2
Not really all that difficult doing 4 traces either. I have a Proliant 6000 Quad 550 Mhz Xeon at work and this server was purchased in early 2000. So server manufacturers have been doing this for years already.


RE: Shifting the burden
By emboss on 10/24/2006 3:08:18 AM , Rating: 2
Nope ... that Proliant has a single bus that connects the four Xeons and the northbridge. This new chipset has FOUR buses, each one going between the northbridge and one CPU. This significantly increases the number of signal lines that have to be routed to the northbridge and makes design of the board much much more complex (possibly requiring more layers as well).

And yet another post plauged by the "oops" error. You've had how many months to fix this problem?


RE: Shifting the burden
By Spivonious on 10/24/2006 9:58:49 AM , Rating: 2
I don't see this as much of a problem. It will just force the board designers to be more symmetric.


RE: Shifting the burden
By s12033722 on 10/24/2006 3:29:52 PM , Rating: 3
This is a very large problem. Symmetry does not address the fact that you now have many hundreds more traces, all of which require careful routing for signal integrity due to the high speeds of these busses, populating the board space in form factors designed with one bus in mind. The only way to solve this is to stack many more layers on the board, which increases cost and complexity quite a bit.


RE: Shifting the burden
By kobymu on 10/24/2006 4:32:46 AM , Rating: 2
Clarksboro is rumored to have CSI.

http://www.2cpu.com/printer.php?id=4267

quote:
... and introduces support for the new Bus architecture, CSI (Common System Interface). Best used for their processor Independent Bus connection to the MCH. (Similarly seen in year of 2000 from AMD with the EV6 on their AthlonMP & 760MPX.) Which rivals AMD's HTT (HyperTransport technology)


RE: Shifting the burden
By francism on 10/24/2006 5:47:50 AM , Rating: 2
Oh no it doesn't. CSI is not expected to arrive before Nehalem. Clarksboro will have 4 FSBs, one for each socket... kinda like the 2-pronged Blackford, except that it's, well, 4-pronged.


Eh?
By Howard on 10/23/2006 7:24:28 PM , Rating: 2
Isn't Woodcrest based on Core?




RE: Eh?
By deeznuts on 10/23/2006 7:28:27 PM , Rating: 3
Yeah but I think those are just DP right? THese are MP which means more then 2 but I could be wrong.


RE: Eh?
By Anh Huynh on 10/23/2006 7:37:37 PM , Rating: 2
These are for 4-way/8-way configurations


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