 One layer of the PCMS array. The memory cell stack, including rows and columns, is shown sandwiched between M2 and M3 (Source: Intel)
Will take a few years to bring to market, though
Intel is one of the market
leaders in SSDs thanks to its supply of 34nm NAND flash memory
from IM Flash Tech. The world's largest semiconductor company owns
half of IMFT in partnership with Micron Technologies. IMFT's NAND
flash chips are not only used in SSDs, but also in USB flash drives
and embedded devices like cell phones.
The price of NAND flash
memory chips has been dropping every year, as bit densities increase
and new process technologies are introduced. However, the NAND flash
party is expected to end in a couple of years, as there is a limit to
how small flash chips can scale.
It is expected than NAND
flash will not scale beyond the 22nm node. Even at 3xnm, there are
only a few electrons available for the Fowler-Nordheim tunnel
injection process, which is how writes are performed on NAND flash.
Current SSDs are already running at 20V internally because of this.
SSD companies are already having speed
problems with Samsung's 32nm NAND flash chips, causing a delay in
their market adoption.
Intel has been thinking about this
problem for a while, and has been working with Numonyx on phase
change memory. PCM uses chalcogenide glass, which can be altered
between crystalline and amorphous states with the application of
heat. Intel believes than PCM will be the
successor to NAND flash, with greater capacity, lower power
consumption, and higher speeds.
“We continue
to develop the technology pipeline for memories in order to
advance the computing platform,” said Al Fazio, Intel Fellow and
Director of Memory Technology Development.
Recent research has
yielded a stackable 64Mb test chip. The ability to stack multiple
layers of PCM arrays within a single die is something that will bring
higher densities. Intel is demonstrating a vertically integrated
memory cell which it calls PCMS (Phase Change Memory and Switch).
PCMS is comprised of a PCM element layered with an Ovonic Threshold
Switch (OTS) in a cross point array. A cross point array is formed by
switch cells occupying separate blocks in a common plane of an
integrated circuit.
“We are encouraged by this research
milestone and see future memory technologies, such as PCMS, as
critical for extending the role of memory in computing solutions and
in expanding the capabilities for performance and memory scaling,"
said Fazio.
Intel says that it has built PCM chips with low
latencies and high bandwidth PCM, and found that it can be stable
down to 5 nanometers. It will still be a couple of years before this
is refined enough to go to market, but Intel wants to be ready to
pick up the pieces when NAND flash scaling stops.
Additional
information about the memory cell, cross point array, Intel's
experiments and results will be published in a joint paper titled “A
Stackable Cross Point Phase Change Memory”. It will be presented at
the 2009 International Electron Devices Meeting in Baltimore,
Maryland in December.
"Vista runs on Atom ... It's just no one uses it". -- Intel CEO Paul Otellini
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