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A 300mm wafer with 45nm test shuttles. Fab 24-2 will only produce 65nm products at launch - Image courtesy Intel
Intel's newest 300mm fab is also its first in Europe

Late yesterday, Intel announced the opening of its newest 300mm wafer facility in Leixlip, Ireland.  The new fab is called Fab 24-2, as the facility is essentially an expansion on the existing Fab 24 facility that was built in 2004.

Intel reports that the facility cost about $2B USD to construct, and with 224,000 feet of clean room space the fab is one of the largest in Intel's fleet.  The facility is also the company's first 65nm factory in Europe.  Details were not revealed on exactly how many wafers and processors per month the new fab will sustain.

Intel's Fab 12 in Chandler, Arizona and D1C/D1D fabs in Hillsboro, Oregon already compose of the majority of Intel's 300mm wafer production.  Late last year, Intel representatives claimed a plan was on the table for a 300mm D1E facility in Hillsboro as well.

Intel also has plans to open another fab in Chandler, dubbed Fab 32, expected to produce 300mm wafers for 45nm CPUs.  Fab 28 in Qiryat Gat, Israel is also expected to product 300mm wafers for 45nm processors when it is completed in 2008.  Intel also has plans to build a massive facility in Ho Chi Minh City, Vietnam, that will even eclipse Fab 24-2 in size. 

AMD is currently considering a multi-billion dollar facility in New York State.



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Title Error
By AnnihilatorX on 6/23/2006 10:14:44 AM , Rating: 2
It should read 300mm wafers not 30mm wafers




RE: Title Error
By rrsurfer1 on 6/23/2006 10:30:20 AM , Rating: 2
That's a hell of a wafer.

Process question: does anyone know why they use circular wafers? If they used squares there would be no lost cores on the edge of the wafer if it was layed out correctly. I'm guessing it has something to do with the etching but I'm not too knowledgable in that area. Anyone know?


RE: Title Error
By KristopherKubicki (blog) on 6/23/2006 10:34:00 AM , Rating: 2
Wafers are literally "spun" from silicon, and grow outwards.


RE: Title Error
By rrsurfer1 on 6/23/2006 10:39:41 AM , Rating: 2
Ahh, that makes sense. Thanks for the info. I think I'll do a little wiki reading on that.


RE: Title Error
By masher2 (blog) on 6/23/2006 12:02:18 PM , Rating: 4
Actually, the most common process is to "pull" a silicon ingot, forming a rough cylinder rather like an enormous candlestick.

The cyclinder is then sliced edgewise into discs, then ground to a perfect circular shape.


RE: Title Error
By Clauzii on 6/24/2006 2:40:59 PM , Rating: 2
Her is an interesting link that explains the float-zone process at a DK company called Topsil :)

http://www.topsil.com/474


RE: Title Error
By bupkus on 6/23/2006 4:28:58 PM , Rating: 2
Like pizza dough? :=)


400mm?
By PrinceGaz on 6/23/2006 8:20:01 PM , Rating: 2
Since all the big chip companies seem to have moved up from 200mm to 300mm, I wonder if there is any reason why they might not next consider 400mm? More dies per wafer has to be a good thing and I'm sure the necessary equipment could be developed.

Or maybe it's a case of it not being possible yet-- I often wonder why they go from 180nm -> 130nm -> 90nm -> 65nm -> 45nm etc when they already know what is planned several generations ahead. Why not make the jump all the way if you already know what you intend to do-- it would have to be cheaper than making multiple changes.




RE: 400mm?
By coldpower27 on 6/23/2006 11:26:54 PM , Rating: 2
One thing the next wafer node to be considered is slated for 2012 IF things go right and is 450mm wafer tehnology.

Larger wafers are desired, but the problem is with 450mm wafer manufacturing only big time players would benefit the most as they can afford these expensive fabs.

Another avenue is being persued currently is that to try to make the current equipment process wafers faster then to make larger wafers, as the end result you get more product in the end. So instead of 450mm wafers we have 300mm wafers flytihng through quicker.

Not to mention the equipment and wafer technology to make these things have to be developed by the industry. Intel doens't make the wafers remember. The supporting infrastruture is needed, and the problem is getting someone to pay for all of it.

It's probably to large a jump to go any other way, hell you have half-node shrinks with companies like TSMC which do 150nm, 80nm, and 110nm.


RE: 400mm?
By dude on 6/24/2006 1:04:53 PM , Rating: 2
The smaller processes are only possible when the can develope optics that can do something that small. It's not like they wouldn't want to, they CAN'T yet!

By the way, the etching optics don't go that small, and they use "trickery" to make it etch such small nano sized traces.


n/a
By Scabies on 6/23/2006 11:00:24 AM , Rating: 2
implications for sales?
implications for R&D?
implications for competition?

do these things spawn CPUs, chipsets...? maybe I should wiki too...




RE: n/a
By rrsurfer1 on 6/23/2006 11:08:18 AM , Rating: 2
Not sure what this particular plant makes, but it could be CPUs or chipsets or both.

Increasing wafer size allows them to produce more cores per wafer which increases yield and decreases manufacturing cost per core. The same type of thing happens when you have a process size reduction (ie, 65nm -> 45nm), only you can get more cores per wafer because the cores are smaller in size.


Jobs
By tk109 on 6/23/2006 11:49:31 AM , Rating: 2
If this 300mm D1E facility in Hillsboro is a brand new fab and not just a retool that means more jobs. (and jobs building the thing). Which means all my property around the area will increase. Which would be nice. Intel is a big asset to our economy around here.




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