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A thinned wafer of silicon computer circuits, which is ready for bonding to another circuit wafer with the "through-silicon via" process
New IBM tech shortens wire lengths inside chips up to 1000 times

IBM is detailing a new breakthrough in three-dimensional chip-stacking technique that allows different chip components to be packaged much closer together for faster, smaller, and lower-power systems. The company claims that the technology will extend Moore’s Law beyond its expected limits.

3D chip stacking takes chips and memory devices that traditionally sit side by side on a silicon wafer and stacks them together on top of one another. The result is a compact sandwich of components that dramatically reduces the size of the overall chip package and boosts the speed at which data flows among the functions on the chip.

The technique of 3D chips is not new, as memory manufacturers such as Samsung and NEC/Elpida/Oki are developing memory in 3D packaging. IBM’s breakthrough is that it does away with the need for long-metal wires that connect today’s chips together, instead relying on “through-silicon vias,” which are essentially vertical connections etched through the silicon wafer and filled with metal. These vias allow multiple chips to be stacked together, allowing greater amounts of information to be passed between the chips.

The technique shortens the distance information on a chip needs to travel by 1000 times, and allows for the addition of up to 100 times more channels, or pathways, for that information to flow compared to traditional chips. 

“This breakthrough is a result of more than a decade of pioneering research at IBM,” said Lisa Su, vice president, Semiconductor Research and Development Center, IBM. “This allows us to move 3-D chips from the 'lab to the fab' across a range of applications.”

The first application of this through-silicon via technology will be in wireless communications chips that will go into power amplifiers for wireless LAN and cellular applications. 3D technology will also be applied to a wide range of chips, including those running now in IBM’s servers and supercomputers. 

IBM says that it is already running chips using the through-silicon via technology in its manufacturing line and will begin making sample chips using this method available to customers in the second half of 2007, with production in 2008.

Over the past few months, IBM has had a number of major chip technology announcements and demonstrations that the company claims will extend Moore’s Law. In December, IBM announced the first 45nm chips using immersion lithography and ultra-low-K interconnect dielectrics. In January, IBM announced high-k metal gate, which substitutes a new material into a critical portion of the transistor that controls its primary on/off switching function. In February, IBM revealed its on-chip memory technology that features the fastest access times ever recorded in eDRAM. Then in March, IBM unveiled a prototype optical transceiver chipset capable of reaching speeds at least eight-times faster than optical components available today.



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3d chips doesn't seem like anything new
By GoatMonkey on 4/13/07, Rating: 0
RE: 3d chips doesn't seem like anything new
By Moishe on 4/13/2007 9:57:39 AM , Rating: 2
They are already manufacturing chips using this tech... that's pretty cool. Usually we receive a press release and some vague future date when we can maybe see the technology in use. Obviously they're starting small but in a few years this kind of stuff will probably be in use in every common device using an chip.


RE: 3d chips doesn't seem like anything new
By GoatMonkey on 4/13/07, Rating: 0
RE: 3d chips doesn't seem like anything new
By nafhan on 4/13/2007 10:37:27 AM , Rating: 2
My guess is that heat would be a problem, and that is why they are initially using this for low power applications.

Also, they probably want to get a handle on this process with small simple chips before they move onto anything complex enough to be putting off a lot of heat.


RE: 3d chips doesn't seem like anything new
By AlfB on 4/13/2007 4:46:57 PM , Rating: 2
You misread the statement. They are using it to lower the power used not for low power applications.


RE: 3d chips doesn't seem like anything new
By PlasmaBomb on 4/13/2007 6:24:28 PM , Rating: 3
There could be a problem with heat dissipation rather than just heat. If you take a chip with an area of 100 mm^2 using 30W and convert it into 2 layers the surface area drops to 25 mm^2 whilst the power remains at 30W.


RE: 3d chips doesn't seem like anything new
By mars777 on 4/14/2007 5:37:03 AM , Rating: 2
But you do understand that copper interconnects on the silicon is where most of the heat is generated? :D
The are removing most of them...


By mars777 on 4/14/2007 5:39:24 AM , Rating: 2
What i mean to say is: thay are just extending moore's law whilst trying to mantain heat dissipation at an acceptable amount (which is what chip improvement is all about).


RE: 3d chips doesn't seem like anything new
By masher2 (blog) on 4/14/2007 10:10:34 AM , Rating: 4
> "you do understand that copper interconnects on the silicon is where most of the heat is generated?"

Eh? Q=I^2Rt. Copper is an excellent conductor, which means low resistance. Silicon is a semiconductor...even when switched on. Less resistance = less heat.

Some heat is generated in the interconnections, but its a small part of the overall picture.


RE: 3d chips doesn't seem like anything new
By shiznit on 4/14/2007 11:50:18 PM , Rating: 2
i thought heat dissipation was a function of surface area? if so then won't this tech make the chips harder to cool? if so it would explain why they are starting production with low power/heat uses, such as cell phones.


RE: 3d chips doesn't seem like anything new
By geddarkstorm on 4/16/2007 9:45:42 AM , Rating: 2
Yes, heat dissipation depends on surface area as well as what dissipation processes are currently at work (convection, radiative, or conduction) and how efficient they are.

But, heat generation is dependent on the amount of current flowing through a material and that material's resistance to said current as well as time. So, shorter connections could generate less heat since the current flows for less time. However, that seems like a moot point if you are doing this in a processor that's running at full speed for long swaths of time. So, a block chip will have less ability to cool unless they come up with some clever ways to do it.


RE: 3d chips doesn't seem like anything new
By masher2 (blog) on 4/16/2007 10:01:14 AM , Rating: 3
> "So, shorter connections could generate less heat since the current flows for less time"

If the current flows for less time, it means the clock rate is higher...which leads to more heat, not less. A shorter trace generates less heat because its total resistance is less, which lowers the voltage drop across it.

But that's a very minor factor in the total power consumption of a chip. Thru-via stacking isn't really designed to lower power usage; its for performance and reliability more than anything.


By GoatMonkey on 4/16/2007 10:37:38 AM , Rating: 2
Didn't somebody say something about carbon nanotube cooling? IBM is supposed to be working on that also. These guys need to talk to each other.


RE: 3d chips doesn't seem like anything new
By Phynaz on 4/13/2007 10:08:21 AM , Rating: 5
Another armchair CEO that thinks he knows how a $100B company should be run.


RE: 3d chips doesn't seem like anything new
By GoatMonkey on 4/13/07, Rating: 0
RE: 3d chips doesn't seem like anything new
By masher2 (blog) on 4/13/2007 11:06:28 AM , Rating: 4
> "Actually, I know exactly how a $100B company should be run. They should sell off the entire company to the highest bidder and give me all of the money."

And thus we see why Communism fails.


By geddarkstorm on 4/16/2007 9:42:07 AM , Rating: 2
You sir win the internets.


By masher2 (blog) on 4/13/2007 11:05:39 AM , Rating: 5
> "It doesn't seem like it would so revolutionary to do this... "

The revolutionary part isn't the idea to stack chips...that idea's been around for decades. The revolutionary part is in getting it to work.


So far for Moore's law
By evanhaut on 4/13/2007 8:59:18 AM , Rating: 1
Mad




RE: So far for Moore's law
By Metroid on 4/13/2007 9:02:14 AM , Rating: 2
Again the Moore's law about. As far as I know it doubles every time.


RE: So far for Moore's law
By Armorize on 4/14/2007 5:33:29 PM , Rating: 2
well I guess that would mean it would quadroople once or twice =P


RE: So far for Moore's law
By venny on 4/13/2007 9:02:15 AM , Rating: 2
Cool!


IBM...
By Moishe on 4/13/2007 9:55:15 AM , Rating: 4
IBM rocks. Buncha geniuses and the money to fund the R&D.

Considering AMD is a client of IBM I wonder if any AMD CPUs will use stacking anytime soon?




Oh No Terminators!
By Mitch101 on 4/13/2007 10:48:58 AM , Rating: 2
Isnt that what was in the Terminators?

Very good time for AMD to have Engineers in the IBM fishkill plant.




RE: Oh No Terminators!
By nerdye on 4/15/2007 9:52:50 PM , Rating: 2
Yes this is a good time for the "industry" to have AMD equipped with IBM technology, but do not forget that INTEL has the same. Who is collaborating with INTEL on the future of their server chipsets, IBM of course. Who is delivering cpu's to xbox 360, ps3 and wii, IBM of course. Although IBM makes case specific products/technology for each client, all of them benefit from dealing with IBM, and not one can be signaled out saying IBM made them successful over another company that uses IBM tech due to the large amount of companies that greatly benefit from IBM's genius.


By rcc on 4/16/2007 11:59:43 AM , Rating: 2
Anyone old enough to remember the original IBM PC, PC/XT, and PC/AT? IBM stacked the RAM chips on the mainboards on those systems.

I'll grant that it's a different case altogether, it just spun me off into a tour of memory lane. That happens with us old folks you know.




computer games
By AntDX316 on 4/13/2007 7:15:16 PM , Rating: 1
this will lead to better and better computer games :)




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