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In a recent interview, AMD's next generation CPU architecture gets a name and a socket

Digitimes has a follow up to its interview with AMD's Henri Richard.  We covered the first interview here yesterday. Digitimes tried to squeeze a few more details out of Richard about the upcoming K8L platform architecture.  In the first interview, Richard would not comment on K8L. 

That's not to say we're going to present K8L at Computex – don't get me wrong – but I think that that would be a good time to start to disclose more about the future because one of the strong attributes of our roadmap, both in 2006 and 2007, is socket compatibility. The nice thing we're going to do is to deliver to customers. Whatever improvements K8L will provide, they will be applicable to some of the sockets we will be introducing. Therefore, there's a certain logic, to my mind, in disclosing more at that time.

In the first interview, Richard referred to the new architecture as "8KL" instead, but Digitimes reporters did not get back to us about this idiosyncrasy.  The three sockets AMD has on the roadmap are the 1207 pin LGA Socket F for servers, Socket AM2 for the desktop and Socket S1 for mobile devices.  All three are expected to have working samples on June 6th, 2006 according to AMD's most recent roadmap. 

In response to the approach AMD will take with K8L, Richard previously claimed that future AMD micro-architectures are strictly evolutionary and not revolutionary.  In yesterday's interview, he also claimed that AMD will arrive at better performance by improving clock speeds and increasing cache sizes, but that future core technologies will have increased integer and floating-point performance.  Seeing as K8L is the only technology on the AMD roadmap for the next year or so after AM2, we can only speculate as to what Richard means by that statement. 

Update 03/15/2006: Chris Hall from Digitimes has confirmed with us that the "8KL" reference was a misquote and that Richard was really referring to K8L.


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Clock and Cache
By mrdelldude on 3/14/2006 3:30:12 PM , Rating: 2
quote:
AMD will arrive at better performance by improving clock speeds and increasing cache sizes


Are they simply following Intel's path?




RE: Clock and Cache
By Spoonbender on 3/14/2006 3:44:30 PM , Rating: 5
You mean the one that has been used for the last 30 years? Ohnoes, how shameful!

It could be because it actually works. The problem is only when you rely solely on that trick, with a chip that doesn't scale well enough.

It's literally the oldest trick in the book. And the reason is that it *always* works. Dualcore chips only help if you run multithreaded apps. Onboard FPU's only work if you have lots of FP operations. Pipelining only works when you have dependencies spred out sufficiently, and out of order execution works, but at the expense of a lot of die space. (and is sorta already included). But if you raise the clock speed, you get better performance, period. (Assuming of course you don't reduce the efficiency of any other parts of the chip)

If they've got an architecture that can scale to higher clock speeds, they'd be dumb not to use it. If they've got a small core compared to Intel's, why not use that extra space for more cache?


RE: Clock and Cache
By Xenoterranos on 3/14/2006 7:02:42 PM , Rating: 2
I agree, and with the onboard memory controller, it may work better than ever (seeing as intel's answer to the on-board controller is to increase cache size). I've wondered long and hard about why AMD hasn't scaled their cpu's up faster and harder, and why they havent used all that extra die space. I guess the real reason was marketing!

They only need to be faster by enough of a margin to be better, but with k8 and Core both basically ancestors of the PIII, and Core being the *presumably* better of the two, will K8L be enough of an evolution to hold AMD in the race until their next architecture refresh (especially with Intel scaling their Core speeds to fast?)

Im ecstatic that intel is back in the game, because that means AMD needs to start thinking again, but it worries me that this could be their best response.


RE: Clock and Cache
By pnyffeler on 3/14/2006 3:49:23 PM , Rating: 2
I'm not sure I really understand this stance by AMD. If we accept for the moment that Intel's Conroe is 10-20% faster than the current AMD processors, what good is it going to be to up the speed or throw more cache at it?

It seems pretty clear that the on-die memory controller negates any significant increase in performance.

Also, wouldn't you thing AMD would be the one to realize that you can't keep pushing up the clock speeds to compensate for an inferior processor architecture? After all, Intel tried that with Net Burst/P4, and all they got was lots of heat and an uninterupted view of the leader's backside.


RE: Clock and Cache
By blckgrffn on 3/14/2006 3:56:47 PM , Rating: 2
Do you realize how much more cache conroe has than the amdx2? That is a huge deal and can probably be directly credited with 5-10% of conroes performance advantage. If AMD ups there cache and pushes ~3.4 ghz or so, then things will probably get very interesting again.

At least interesting in the respect that the market will have choices, instead of there being one clear winner like the AMD64 vs the Prescott P4.


RE: Clock and Cache
By hans007 on 3/14/2006 4:07:12 PM , Rating: 2
a lot of conroes will only have 2mb cache actually. that is the same amount as the x2.


RE: Clock and Cache
By Bonrock on 3/14/2006 5:35:31 PM , Rating: 3
Where did you get that information? I have read quotes of Intel officials stating that all Conroe processors will have 4MB of cache. I'm not sure how much cache was in the Conroe processor that was benchmarked, but I would be surprised if Intel didn't try to put its best foot forward by using a 4MB version.

Cache has a huge impact on performance, as anyone who has taken a class on computer architecture can attest. If the benchmarked Conroe did indeed have a 4MB cache, then I think it's safe to say that a large chunk of its performance improvement can be attributed to that. If AMD manages to work a larger cache into its processors, they could close the performance gap.


RE: Clock and Cache
By Doormat on 3/14/2006 5:49:40 PM , Rating: 2
http://www.theinquirer.net/?article=29504

There was the same info here at DT, but the search engine sucks and I cant find the specific article.


I believe these were the benchmark parameters
By DallasTexas on 3/14/06, Rating: -1
By smitty3268 on 3/14/2006 6:30:44 PM , Rating: 2
- Overclock the FX60 just before it bursts into flames (like the AMD K5 did... or does)

Well, it was an average OC on a poorly OCing chip. AMD is probably going to have to come out with a new revision before they can bump up the clock speed too much, but its not like that was the highest OC ever done.

- Use a Celeron version of Conroe clocked for the entry level

No, this was not the cheapo version of Conroe. It would be about like a 3.6GHz Prescott right now. Fast, but there are a few steps above, especially the EE chips.

- Turn off the Conroe's cache

What? You can't turn off cache - or at least not easily outside of the factory. This chip had the full 4MB L2 cache, while cheaper versions (not benchmarked yet) will only have 2MB.


By Xenoterranos on 3/14/2006 7:05:48 PM , Rating: 2
LOL, I would buy a case of chips that could attain that performance without cache!


By Missing Ghost on 3/14/2006 7:15:29 PM , Rating: 2
I have settings to disable the caches in my computer's bios settings.


By smitty3268 on 3/14/2006 7:24:47 PM , Rating: 2
Well, it certainly isn't impossible if the hardware support is there. The Pentium M will turn off portions of its cache on-the-fly to save power. But I fail to see why anyone would think that Intel would completely disable their cache on a chip they are benchmarking. And the original post made it sound like they went into Windows Control Panel and selected "Turn off cache" or something to that affect - maybe I just read it wrong.


RE: Clock and Cache
By coldpower27 on 3/14/2006 7:17:24 PM , Rating: 2
Well Conroe has 4MB of cache, but fro desktop Intel will also ship the Allendale core which has 2MB of LV2 Cache, slated for the 241 and 209US price points at launch.


RE: Clock and Cache
By DigitalFreak on 3/14/2006 4:15:26 PM , Rating: 2
Another thing is that AMD has yet to move to a .65 micron process, where Intel already has and is basing Conroe on that. .65 micron should give the Athlon64 / Opteron quite a bit more headroom.


RE: Clock and Cache
By Viditor on 3/15/2006 6:28:46 AM , Rating: 2
quote:
Another thing is that AMD has yet to move to a .65 micron process, where Intel already has and is basing Conroe on that. .65 micron should give the Athlon64 / Opteron quite a bit more headroom

AMD is producing 65nm for sale, just not at volume production level. They announced last week that 65nm volume production starts in Aug..
The word is that AMD has already sold all of it's production for Q1, Q2, and part of Q3...I expect that the equipment changeover is already beginning (at least at 1 of the 2 Fabs that will be producing 65nm).


RE: Clock and Cache
By masher2 (blog) on 3/15/2006 12:20:39 PM , Rating: 2
I didn't see this announcement...got a link?


RE: Clock and Cache
By Viditor on 3/16/2006 2:43:04 AM , Rating: 2
quote:
I didn't see this announcement...got a link?

I do, but you have to register. It was Hector Ruiz at the JPMorgan conference...
http://tinyurl.com/nkf6o


RE: Clock and Cache
By JackPack on 3/14/2006 5:32:31 PM , Rating: 3
Just because Conroe _may_ be heavily affected by cache does not mean the same will be true for K8. Conroe also uses a shared L2, while K8 does not.

K8 already has a low latency path to the main memory. Chances are, adding cache will not help much with performance.