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AMD's upcoming 65nm and 45nm quad-core roadmap.  (Source: AMD)
Those waiting on next-generation bus features from AMD will have to wait a little bit longer

Remember all the press about HyperTransport 3.0 making its debut on AMD's quad-core Barcelona cores

HyperTransport 3.0, also dubbed HT3, almost doubles the data transfer headroom from HT2.  The increased bandwidth, while interesting on paper, does very little to increase performance on existing AMD processors as those CPUs are not bandwidth limited on the transport bus. 

After a while, people stopped talking about HT3 on Barcelona, and insisted we'd see it on second-generation AMD native quad-core CPUs.  Earlier this year, AMD touted we'd see HyperTransport 3.0 on its 45nm shrink of Barcelona, Shanghai.

On AMD's current roadmaps and at the AMD Analyst Day today, AMD further pushed back its introduction of HyperTransport 3.0 into 2009, with the introduction of SandTiger.

AMD's roadmap still claims we'll see HyperTransport 3.0 support on the quad-core Budapest-family processors. Budapest, according to AMD's guidance, is essentially a desktop AMD Phenom processor designed for high-end workstations on the AM2 socket.

The most attractive aspect of HT3 from a server perspective is the un-ganging mode.  Un-ganging essentially allows the computer to reconfigure the lane configurations on-the-fly.  A server with HyperTransport 3.0 could reconfigure a single 1x16 link into a 2x8 link with some intelligent management.

Adding HyperTransport 3.0 support to single-socket AM2 configurations is great, but not particularly useful.  The additional headroom may aid certain applications, but the really cool features like un-ganging mode will have to wait until 2009.




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