quote: Yes, I'm reasonably certain they have to go CPU1->Northbridge->CPU2 and vice versa.
quote: Well, in this case, I would think the 4 cores can exchange data via the crossbar switch instead of doing it via RAM.
quote: Inter-CPU cache syncs via MESI protocol.
quote: Anything that uses more than one processor... DUH
quote: I am fairly certain I read somewhere that Kentsfield allows the two cores to communicate directly on the chip package and not over the FSB. I will try to dig that up
quote: this means that the cores communicate through the L2 cache crossbar instead of the FSB
quote: Smithfield was two dies, in a single package.
quote: Smithfield is a single die. Presler is basically two Cedar Mills slapped together though
quote: That's why I wondered why AMD didn't do multi-die consumer processors using HyperTransport on the package to communicate between dies
quote: And some of these design changes are likely to include tweaks to improve process yields
quote: Device and timing modeling for a new process is not initially as accurate as for a mature process
quote: Yeah, since they were pretty much the first to release news of the pending AMD/ATI merger, when everyone thought they were insane. Wait a mintue...
quote: Actually, it appears both K9 and K10 are "dead."
quote: Well form what I remember HKEPC had roadmaps of server Quad Cores for Mid 2007. The K8L Quad Cores for desktop are the ones that are apparently not due till 2008.